Achronix Speedster22i SerDes Manual do Utilizador descarregar pdf (Página 13)

Physical Media Attachment (PMA)

The PMA architecture is shown in “Figure 3: PMA Architecture” below.

Figure 3: PMA Architecture

The PMA consists three major blocks:

1. Common

2. Receiver/Transmitter (RX/TX)

3. Digital PMA (DPMA)

1. Common

The common block consists of the following circuits:

• Reference clock: This circuit performs reference clock buffering and division before

feeding it to the Synthesizer.

• Synthesizer: The synthesizer (transmit PLL) generates the high speed clock for the

serializer of the Transmitter. It also has in-built circuit for spread-spectrum clocking

• Bias: The biasing circuit is responsible for controlling the offsets and biasing for the

all the analog circuits in the PMA

• Analog Test Port: This port is used by Achronix for manufacturing tests and for

debugging purposes

UG028, July 1, 2014

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