Achronix Speedster22i User Macro Guide Manual do Utilizador descarregar pdf (Página 102)

Lookup Table (LUT) Functions LUT4

Speedster Macro Cell Library

AchronixSemiconductorProprietary PAGE 85

Table 4-3: Function Table

din3 din2 din1 din0 q

0 0 0 0 lut_function[0]

0 0 0 1 lut_function[1]

0 0 1 0 lut_function[2]

0 0 1 1 lut_function[3]

0 1 0 0 lut_function[4]

0 1 0 1 lut_function[5]

0 1 1 0 lut_function[6]

0 1 1 1 lut_function[7]

1 0 0 0 lut_function[8]

1 0 0 1 lut_function[9]

1 0 1 0 lut_function[10]

1 0 1 1 lut_function[11]

1 1 0 0 lut_function[12]

1 1 0 1 lut_function[13]

1 1 1 0 lut_function[14]

1 1 1 1 lut_function[15]

Verilog Instantiation Template

LUT4 #(.lut_function(16’h0123))

instance_name(.dout(user_out),

.din0(user_in0),

.din1(user_in1),

.din2(user_in2),

.din3(user_in3));

VHDL Instantiation Template

------------- ACHRONIX LIBRARY ------------

library speedster22i;

use speedster22i.components.all;

------------- DONE ACHRONIX LIBRARY ---------

-- Component Instantiation

LUT4_instance_name : LUT4

generic map (lut_function => X”0123”)

port map (dout => user_out,

din0 => user_din0,

din1 => user_din1,

din2 => user_din2,

din3 => user_din3);

1 2 ... 97 98 99 100 101 102 103 104 105 106 107 ... 223 224

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Achronix Speedster22i User Macro Guide Manual do Utilizador Página 102