Achronix Speedster22i User Macro Guide Manual do Utilizador descarregar pdf (Página 89)

Registers DFFNES

Speedster22i Macro Cell Library

AchronixSemiconductorProprietary PAGE 73

sr_assertion

The sr_assertion param eter defines the behavior of the output when the sn set input is

asserted.Assigningthesr_assertionto“unclocked”resultsinanasychronousassertionofthe

set signal, where the q output is set to one upon assertion of the active‐low set signal.

Assigning the sr_assertion to “clocked” re

sults in a synchronous assertion of the set signal,

wheretheqoutputissettooneatthenextfallingedgeoftheclock.Thedefaultvalueofthe

sr_assertionparameteris“unclocked”.

Table 2-36: DFFNES Function Table when sr_assertion = “unclocked”

Inputs Output

sn ce d ckn q



Table 2-37: DFFNES Function Table when sr_assertion = “clocked”

Inputs Output

sn ce d ckn q



Verilog Instantiation Template

DFFNES #(.init(1’b1),

.sr_assertion(“unclocked”))

instance_name

(.q(user_out),

.d(user_din),

.sn(user_set),

.ce(user_clock_enable),

.ckn(user_clock));

0X X X 1

10 X XHold

11 0 0

1 1

0X X



10 X XHold

11 0 0

1 1

1 2 ... 84 85 86 87 88 89 90 91 92 93 94 ... 223 224

Sem comentários

Achronix Speedster22i User Macro Guide Manual do Utilizador Página 89