Achronix Speedster22i User Macro Guide Manual do Utilizador descarregar pdf (Página 73)

Registers DFFER

Speedster22i Macro Cell Library

AchronixSemiconductorProprietary PAGE 57

DFFER

Positive Clock Edge D-Type Register with Clock Enable and

Asynchronous/Synchronous Reset

DFFER

Figure 2-5: Logic Symbol

DFFERisasing

leD‐typeregisterwithdatainput(d),clockenable(ce),clock(ck),and active‐

lowreset(rn)inputsanddata(q)output.Theactive‐lowresetinputoverridesallotherinputs

whenitisassertedlowandsetsthedataoutputlow.Theresponseoftheqoutputinresponse

to the as

serted reset depends on the value of the sr_assertion parameter and is detailed in

Table 2‐15

: DFFER Function Table when sr_assertion  = “unclocked” and Table

2‐16: DFFERFunct

ionTablewhensr_assertion=“clocked”.Iftheresetinputisnotasserted,

thedataoutputisse

ttothevalueonthedatainputuponthenextrisingedgeoftheclockifthe

active‐highclockenableinputisasserted.

Pins

Table 2-13: Pin Descriptions

Name Type Description

d Data input.

Active-low asynchronous/sy

nchronous reset input. A low on rn sets the

q output low independent of the other inputs if the sr_assertion parame-

ter is set to “unclocked”. If the sr_assertion parameter is set to “clocked”, a

w on rn sets the q output low at the next rising edge of the clock.

ce Active-high clock enable input.

ck Positive-edge clock input.

Data output. The value pr

esent on the data input is transferred to the q

output upon the rising edge of the clock if the clock enable input is high

and the reset input is high.

Parameters

Table 2-14: Parameters

Parameter Defined Values Default Value

init 1’b0

sr_assertion “unclocked”

init

The init parameter defines the initial value of the output of the DFFER register.Thisis the

valuetheregistertakesupontheinitialapplicationofpowertotheFPGA.Thedefaultvalue

oftheinitparameteris1’b0.

input

output

1’b0, 1’b1

“unclocked”, “clocked”

1 2 ... 68 69 70 71 72 73 74 75 76 77 78 ... 223 224

Comentários a estes Manuais

Sem comentários

Achronix Speedster22i User Macro Guide Manual do Utilizador Página 73

Comentários a estes Manuais